An integrated folded-patch chip-size antenna using high-resistivity polycrystalline silicon substrate
High-resistivity polycrystalline silicon (HRPS) wafers are utilized as low-loss substrates for three-dimensional integration of on-chip antennas in wafer-level chip-scale packages (WLCSP). Sandwiching of HRPS and silicon wafers enables to integrate complex RF passives with a spacing of >150 µm to...
Main Author: | |
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Other Authors: | , , , |
Format: | conferencePaper |
Language: | eng |
Published: |
2004
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Subjects: | |
Online Access: | http://hdl.handle.net/1822/1619 |
Country: | Portugal |
Oai: | oai:repositorium.sdum.uminho.pt:1822/1619 |