FPGA vendor-agnostic IP-XACT- and XSLT-based RTL design generator
The growing complexity of current embedded systems increases not only the time-to-prototype and time-to-market, but it also requires a major effort around repetitive engineering tasks in order to maximize the efficiency and minimize the money investment. A lot of research has been done on this field...
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Other Authors: | , , |
Format: | conferencePaper |
Language: | eng |
Published: |
2016
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Subjects: | |
Online Access: | http://hdl.handle.net/1822/52762 |
Country: | Portugal |
Oai: | oai:repositorium.sdum.uminho.pt:1822/52762 |