OCD-FI: On-Chip Debug and Fault Injection

This paper presents a set of modifications to common processor on-chip debugging infrastructures to support the execution of fault injection campaigns. The proposed solution is applicable to different target architectures and imposes a very low logic overhead, providing a flexible and efficient mech...

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Bibliographic Details
Main Author: José Martins Ferreira (author)
Other Authors: André V. Fidalgo (author), Gustavo R. Alves (author)
Format: conferenceObject
Language:eng
Published: 2006
Subjects:
Engenharia electrotécnica, Engenharia electrotécnica, electrónica e informática
Electrical engineering, Electrical engineering, Electronic engineering, Information engineering
Online Access:https://hdl.handle.net/10216/84044
Country:Portugal
Oai:oai:repositorio-aberto.up.pt:10216/84044
Description
Summary:This paper presents a set of modifications to common processor on-chip debugging infrastructures to support the execution of fault injection campaigns. The proposed solution is applicable to different target architectures and imposes a very low logic overhead, providing a flexible and efficient mechanism for verifying and validating fault tolerant components.

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