Unified transform architecture for AVC, AVS, VC-1 and HEVC high-performance codecs

A unified architecture for fast and efficient computation of the set of two-dimensional (2-D) transforms adopted by the most recent state-of-the-art digital video standards is presented in this paper. Contrasting to other designs with similar functionality, the presented architecture is supported on...

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Bibliographic Details
Main Author: Dias, Tiago (author)
Other Authors: Roma, Nuno (author), Sousa, Leonel (author)
Format: article
Language:eng
Published: 2015
Subjects:
Video Coding
Multi-Standard
Transform Architecture
Systolic Array
FPGA
Online Access:http://hdl.handle.net/10400.21/4844
Country:Portugal
Oai:oai:repositorio.ipl.pt:10400.21/4844

Internet

http://hdl.handle.net/10400.21/4844

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