An IEEE 1149.x Embedded Test Coprocessor

This paper describes a microprogrammed architecture for an embedded coprocessor that is ableto control IEEE 1149.1 to IEEE 1149.7 test infrastructures, and explains how to expand the supportedtest command set. The coprocessor uses a fast simplex link (FSL) channel to interface a32-bit MicroBlaze CPU...

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Bibliographic Details
Main Author: José Manuel Martins Ferreira (author)
Other Authors: Ukbagiorgis Iyasu Gebremeskel (author)
Format: article
Language:eng
Published: 2014
Subjects:
Engenharia electrotécnica, Engenharia electrotécnica, electrónica e informática
Electrical engineering, Electrical engineering, Electronic engineering, Information engineering
Online Access:https://hdl.handle.net/10216/84075
Country:Portugal
Oai:oai:repositorio-aberto.up.pt:10216/84075
Description
Summary:This paper describes a microprogrammed architecture for an embedded coprocessor that is ableto control IEEE 1149.1 to IEEE 1149.7 test infrastructures, and explains how to expand the supportedtest command set. The coprocessor uses a fast simplex link (FSL) channel to interface a32-bit MicroBlaze CPU, but it can work with any microprocessor core that accepts this simpleFIFO-based interface method. The implementation cost (logic resource usage for a Xilinx Spartan6FPGA) and the performance data (operating frequency) are presented for a test command setcomprising two parts: 1) the full IEEE 1149.1 structural test operations; 2) a subset of IEEE 1149.7operations selected to illustrate the implementation of advanced scan formats.

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