Non-intrusive hardware acceleration for dynamic binary translation in embedded systems

This article describes a non-intrusive hardware acceleration approach for Dynamic Binary Translation (DBT) in modern resource-constrained embedded systems, detailing its motivation, design decisions and overall architecture. It was deployed and tested on DBTOR, an in-house DBT system that targets co...

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Detalhes bibliográficos
Autor principal: Gomes, Tiago Manuel Ribeiro (author)
Outros Autores: Salgado, Filipe Alexandre Andrade (author), Cabral, Jorge (author), Tavares, Adriano (author), Monteiro, João L. (author)
Formato: conferencePaper
Idioma:eng
Publicado em: 2019
Assuntos:
Computer architectures
Dynamic binary translation (DBT)
Dynamic compilation
Embedded systems
Instruction-set architecture (ISA)
Peripheral emulation
Science & Technology
Texto completo:https://hdl.handle.net/1822/71347
País:Portugal
Oai:oai:repositorium.sdum.uminho.pt:1822/71347

Texto Completo

https://hdl.handle.net/1822/71347

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