Rodrigues, T., & Véstias, M. (2016). Using dynamic reconfiguration to reduce the area of a JPEG decoder on FPGA.
Chicago Style (17th ed.) CitationRodrigues, Tiago, and Mário Véstias. Using Dynamic Reconfiguration to Reduce the Area of a JPEG Decoder on FPGA. 2016.
MLA (8th ed.) CitationRodrigues, Tiago, and Mário Véstias. Using Dynamic Reconfiguration to Reduce the Area of a JPEG Decoder on FPGA. 2016.
Warning: These citations may not always be 100% accurate.