A scheduling framework for heterogenous multiprocessor architectures based on industrial processors (DSP and microcontrollers)

Current VLSI and networking technology, the increase in computational power, and the rapid decrease in computational cost, enable the interconnection of VLSI processors, which can be arranged on a functional decomposition of the computational task to exploit the potential of multiprocessing. The use...

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Bibliographic Details
Main Author: Tavares, Adriano (author)
Other Authors: Couto, Carlos (author)
Format: conferencePaper
Language:eng
Published: 2001
Subjects:
Scheduling
Heterogeneous multiprocessor system
Embedded systems
Tabu search method
Optimization methods
Interprocessor communication modeling
Online Access:http://hdl.handle.net/1822/2029
Country:Portugal
Oai:oai:repositorium.sdum.uminho.pt:1822/2029

Internet

http://hdl.handle.net/1822/2029

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