A scheduling framework for heterogenous multiprocessor architectures based on industrial processors (DSP and microcontrollers)
Current VLSI and networking technology, the increase in computational power, and the rapid decrease in computational cost, enable the interconnection of VLSI processors, which can be arranged on a functional decomposition of the computational task to exploit the potential of multiprocessing. The use...
| Autor principal: | |
|---|---|
| Outros Autores: | |
| Formato: | conferencePaper |
| Idioma: | eng |
| Publicado em: |
2001
|
| Assuntos: | |
| Texto completo: | http://hdl.handle.net/1822/2029 |
| País: | Portugal |
| Oai: | oai:repositorium.sdum.uminho.pt:1822/2029 |