Verification conditions for single-assignment programs

A mechanism for generating verification conditions (VCs) for the iteration-free fragment of an imperative language is fundamental in any deductive program verification system. In this paper we revisit symbolic execution, weakest preconditions, and bounded model checking as VC-generation mechanisms,...

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Bibliographic Details
Main Author: Cruz, Daniela da (author)
Other Authors: Frade, M. J. (author), Pinto, Jorge Sousa (author)
Format: conferencePaper
Language:eng
Published: 2012
Subjects:
Online Access:http://hdl.handle.net/1822/30966
Country:Portugal
Oai:oai:repositorium.sdum.uminho.pt:1822/30966
Description
Summary:A mechanism for generating verification conditions (VCs) for the iteration-free fragment of an imperative language is fundamental in any deductive program verification system. In this paper we revisit symbolic execution, weakest preconditions, and bounded model checking as VC-generation mechanisms, and propose a uniform presentation of the corresponding sets of VCs, in terms of (logical encodings of) paths in the control-flow graph of a single-assignment form of the program under analysis. This allows us to compare the mechanisms, in particular with respect to the size of the generated formulas.