HDL approach to board-level BIST
Boundary scan is now the most promising technology for testing high-complexity printed circuit boards. The number of BST components available to board-level designers is however still restricted, limiting the achievable fault coverage. The requirements to improve board-level testability are analyzed...
| Autor principal: | |
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| Outros Autores: | , , |
| Formato: | book |
| Idioma: | eng |
| Publicado em: |
1993
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| Assuntos: | |
| Texto completo: | https://repositorio-aberto.up.pt/handle/10216/84553 |
| País: | Portugal |
| Oai: | oai:repositorio-aberto.up.pt:10216/84553 |