Sparse matrix multiplication on a reconfigurable many-core architecture

Sparse matrix-vector multiplication (SMVM) is a fundamental operation in many scientific and engineering applications. In many cases sparse matrices have thousands of rows and columns where most of the entries are zero, while non-zero data is spread over the matrix. This sparsity of data locality re...

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Bibliographic Details
Main Author: Pinhão, João (author)
Other Authors: José, Wilson (author), Neto, Horácio (author), Véstias, Mário (author)
Format: conferenceObject
Language:eng
Published: 2016
Subjects:
Sparse matrix
FPGA
Many-core
Matrix multiplication
Online Access:http://hdl.handle.net/10400.21/6015
Country:Portugal
Oai:oai:repositorio.ipl.pt:10400.21/6015

Internet

http://hdl.handle.net/10400.21/6015

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