High throughput and scalable architecture for unified transform coding in embedded H.264/AVC video coding systems

An innovative high throughput and scalable multi-transform architecture for H.264/AVC is presented in this paper. This structure can be used as a hardware accelerator in modern embedded systems to efficiently compute the 4×4 forward/inverse integer DCT, as well as the 2-D 4×4 / 2×2 Hadamard transfor...

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Bibliographic Details
Main Author: Dias, Tiago (author)
Other Authors: Lopez, Sebastian (author), Roma, Nuno (author), Sousa, Leonel (author)
Format: conferenceObject
Language:eng
Published: 2020
Subjects:
Video coding
H.264/AVC
Unified transform kernel
Scalable architecture
FPGA
Online Access:http://hdl.handle.net/10400.21/12297
Country:Portugal
Oai:oai:repositorio.ipl.pt:10400.21/12297

Internet

http://hdl.handle.net/10400.21/12297

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