From Circuit Simulation to Circuit Verification: An Internal + Boundary Scan-based Solution
Matching the results obtained from circuit simulation with those extracted from circuit functioning is a common stage of the final verification process. Many current verification techniques use the I/O vectors produced during functional and / or timing simulation, for creating the test vectors to be...
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| Other Authors: | , , |
| Format: | conferenceObject |
| Language: | eng |
| Published: |
2017
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| Subjects: | |
| Online Access: | http://hdl.handle.net/10400.22/9606 |
| Country: | Portugal |
| Oai: | oai:recipp.ipp.pt:10400.22/9606 |