APA (7th ed.) Citation

Viana, R. d. F. (2020). Design and simulation of a RISC-V dual-core lockstep for fault tolerant systems.

Chicago Style (17th ed.) Citation

Viana, Rafael de Figueredo. Design and Simulation of a RISC-V Dual-core Lockstep for Fault Tolerant Systems. 2020.

MLA (8th ed.) Citation

Viana, Rafael de Figueredo. Design and Simulation of a RISC-V Dual-core Lockstep for Fault Tolerant Systems. 2020.

Warning: These citations may not always be 100% accurate.