Analysis and comparison of different approaches to implementing a network-based parallel data processing algorithm
It is well known that network-based parallel data processing algorithms are well suited to implementation in reconfigurable hardware recurring to either Field-Programmable Gate Arrays (FPGA) or Programmable Systems-on-Chip (PSoC). The intrinsic parallelism of these devices makes it possible to execu...
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| Formato: | article |
| Idioma: | eng |
| Publicado em: |
2022
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| Texto completo: | http://hdl.handle.net/10773/35261 |
| País: | Portugal |
| Oai: | oai:ria.ua.pt:10773/35261 |