Reconfigurable power quality analyser - Fazendeiro, João Fernando de Aguiar (2017)
Electronic power supplies are found in almost all electrical equipment. They are sensitive to power quality disturbances but they themselves are causers of interference. This becomes more prominent with their wider use which means that these disturbances have a tendency to aggravate in future. One of the results will be that additional losses will occur and end-users will also be penalised for it by paying more. There is a need to revert this tendency also in an effort to help lower pollution. Another consequence of disturbances is the added difficulty that power grid operators will have to maintain the network stable. Everyone would therefore benefit from more efficient electricity consumption. A power quality disturbance can be measured with a power quality analyser to help the technician find its cause. This is the first step to finding a solution to resolve the disturbance. The objective of this project was to implement digital signal processing algorithms on a FPGA for the analysis of power quality disturbances. The motive for choosing the FPGA was that it allowed a processor, used for lower demanding processing tasks, and dedicated hardware, used for time-critical operations, to be integrated into a single integrated circuit. The implementation of these algorithms in dedicated hardware permitted obtaining high-resolution measurements and the exploitation of parallelism to increase the quantity of information available to the user. The FPGA is a versatile component, ideal to implement the reconfigurable power quality analyser that is upgradable in future. The project resulted in the successful measurement of the fundamental frequency and the magnitude of the signal at the input. The device was able to detect and measure harmonic and inter-harmonic components. Positive and negative peak values were measured and the root mean square value both for full-cycle and half-cycle were calculated making stationary signal variation evaluation possible. Time aggregation of values was also done. The generation of an internal signal made it possible for the comparison with the input signal, resulting in event isolation for further verification and classification by the controller.