Evolutionary design of combinational logic circuits
This paper proposes a genetic algorithm for designing combinational logic circuits and studies four different case examples: 2-to-1 multiplexer, one-bit full adder, four-bit parity checker and a two-bit multiplier. The objective of this work is to generate a functional circuit with the minium number...
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| Other Authors: | , |
| Format: | article |
| Language: | eng |
| Published: |
2019
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| Subjects: | |
| Online Access: | http://hdl.handle.net/10400.22/13499 |
| Country: | Portugal |
| Oai: | oai:recipp.ipp.pt:10400.22/13499 |
| Summary: | This paper proposes a genetic algorithm for designing combinational logic circuits and studies four different case examples: 2-to-1 multiplexer, one-bit full adder, four-bit parity checker and a two-bit multiplier. The objective of this work is to generate a functional circuit with the minium number of gates. |
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