A Framework for System-Level Co-Verification Using the BST Infrastructure - Gustavo R. Alves (1999)
A good verification strategy should bring near the simulation and real functioning environments. In this paper we describe a system-level co-verification strategy that uses a common flow for functional simulation, timing simulation and functional debug. This last step requires the use of a BST infrastructure, now widely available on commercial devices, specially on programmable devices with medium / large pin-counts.