FPGA implementation of autonomous navigation algorithm with dynamic adaptation of quality of service

The main goal of this work is to build an hardware-aided autonomous navigation system based on real-time stereo images and to study Partial Reconfiguration aspects applied to the system. The system is built on an reconfigurable embedded development platform consisting of an IBM PowerPC 440 processor...

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Detalhes bibliográficos
Autor principal: Jose Carlos Sá (author)
Outros Autores: João Canas Ferreira (author), José Carlos Alves (author)
Formato: book
Idioma:eng
Publicado em: 2013
Assuntos:
Texto completo:https://hdl.handle.net/10216/70146
País:Portugal
Oai:oai:repositorio-aberto.up.pt:10216/70146
Descrição
Resumo:The main goal of this work is to build an hardware-aided autonomous navigation system based on real-time stereo images and to study Partial Reconfiguration aspects applied to the system. The system is built on an reconfigurable embedded development platform consisting of an IBM PowerPC 440 processor embedded in a Xilinx Virtex-5 FPGA to accelerate the most critical task. Three Reconfigurable Units were incorporated in the designed system architecture. The dynamic adjustment of systems quality of service was achieved by using different reconfiguration strategies to match vehicle speed. A speedup of 2 times for the critical task was obtained, compared with a software-only version. For larger images, the same implementation would achieve an estimated speedup of 2.5 times.