Characterization and modelling of long-term memory effects in GaN HEMTs - Gomes, José Miguel Alves Faria (2017)
Gallium nitride (GaN) high electron mobility transistor (HEMT) technology has been revolutionizing the RF power amplifier (PA) market. Its potential, versus existing technologies, such as Silicon (Si) Laterally-Diffused MOS(LDMOS), is yet to be completely explored. However, the lack of good characterization and modelling of charge carrier trapping related phenomena has been hampering PA designers from extracting this technology’s promised performance. Hence, GaN HEMT trapping has been given a great amount of attention by the scientific and industrial worlds. This is mainly because the overall linearity of the PA built with this technology is affected, to a great extent, by the trapping state dependence on the device’s drain peak voltage. Circuit computer-aided design (CAD) tools are almost ubiquitous at research and development labs. However, these tools rely, not only on their simulation algorithms, but also on their built-in device models. This makes the development of accurate models a fundamental task. This work reports a multi-bias small-signal equivalent circuit (SSEC) model extraction procedure of a 3.3 W GaN HEMT from pulsed S-parameters as well as the development of a pulsed DC I-V measurement system and its use in the characterization of trapping-effects. This system, which is based on two pulser circuits, designed specifically for gate and drain pulsed measurements, was then automated through a MATLAB/PC controller. The pulser circuits allowed pulse widths on the microsecond scale at very low duty cycles as well as high peak voltages - close to 50 V - and currents - up to 4 A. With the developed system, isothermal standard pulsed I-V curves, as well as trapping-state dependent, isodynamic, pulsed I-V curves were obtained from a 15 W GaN HEMT device. In order to obtain the latter, the so-called double-pulse measurement technique was used. The expected asymmetric time constants associated with drain-lag were clearly observed: on the ns scale for the trapping and on the hundreds of milliseconds for the de-trapping. The predicted relatively reduced impact of gate-lag phenomena in more recent GaN HEMT technologies was also verified.