| Summary: | In this paper it is proposed a new technique to improve the reliability of fault-tolerant systems based on self-reconfigurable FPGAs. The aim is to create a self-tolerant system based on selfreconfiguration. To achieve this objective the work was divided in five main tasks: the analysis of fault inducement mechanisms in FPGAs, its correlation and its matching with existent fault models, or, eventually, if necessary, the proposal of a new model; the design and evaluation of a fault tolerance mechanism for FPGAs; the design and implementation of a methodology able to detect, diagnose and repair the emerging faults; the development and validation of the proposed methodology. This study will be the base for a PhD thesis.
|
|---|