High Performance Multi-Standard Architecture for DCT Computation in H.264/AVC High Profile and HEVC Codecs

A new high performance architecture for the computation of all the DCT operations adopted in the H.264/AVC and HEVC standards is proposed in this paper. Contrasting to other dedicated transform cores, the presented multi-standard transform architecture is supported on a completely configurable, scal...

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Bibliographic Details
Main Author: Dias, Tiago (author)
Other Authors: Roma, Nuno (author), Sousa, Leonel (author)
Format: conferenceObject
Language:eng
Published: 2014
Subjects:
Video coding
AVC / HEVC
Integer DCT
Multistandard architecture
Systolic array
FPGA
Online Access:http://hdl.handle.net/10400.21/3583
Country:Portugal
Oai:oai:repositorio.ipl.pt:10400.21/3583

Internet

http://hdl.handle.net/10400.21/3583

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