Logic Circuits Synthesis Through Genetic Algorithms
This paper proposes a genetic algorithm for designing combinational logic circuits and studies four different case examples: the 2-to-1 multiplexer, the one-bit full adder, the four-bit parity checker and the two-bit multiplier. The objective of this work is to generate a functional circuit with the...
Main Author: | |
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Other Authors: | , |
Format: | conferenceObject |
Language: | eng |
Published: |
2019
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Subjects: | |
Online Access: | http://hdl.handle.net/10400.22/13125 |
Country: | Portugal |
Oai: | oai:recipp.ipp.pt:10400.22/13125 |