Logic Circuits Synthesis Through Genetic Algorithms
This paper proposes a genetic algorithm for designing combinational logic circuits and studies four different case examples: the 2-to-1 multiplexer, the one-bit full adder, the four-bit parity checker and the two-bit multiplier. The objective of this work is to generate a functional circuit with the...
| Autor principal: | |
|---|---|
| Outros Autores: | , |
| Formato: | conferenceObject |
| Idioma: | eng |
| Publicado em: |
2019
|
| Assuntos: | |
| Texto completo: | http://hdl.handle.net/10400.22/13125 |
| País: | Portugal |
| Oai: | oai:recipp.ipp.pt:10400.22/13125 |