Folded-patch chip-size antennas for wireless microsystems using wafer-level chip-scale packaging
This paper reports on design and fabrication options of an integrated folded shorted-patch chip-size antenna for applications in short-range wireless microsystems. The antenna is built using a stack of two adhesively bonded wafers with patterned metallization and through-wafer electrical interconnec...
Main Author: | |
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Other Authors: | , , , |
Format: | conferencePaper |
Language: | eng |
Published: |
2003
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Subjects: | |
Online Access: | http://hdl.handle.net/1822/1618 |
Country: | Portugal |
Oai: | oai:repositorium.sdum.uminho.pt:1822/1618 |
Summary: | This paper reports on design and fabrication options of an integrated folded shorted-patch chip-size antenna for applications in short-range wireless microsystems. The antenna is built using a stack of two adhesively bonded wafers with patterned metallization and through-wafer electrical interconnects. Different fabrication options based on via formation in glass and/or high-resistivity silicon substrates using excimer laser ablation or powder blasting are analyzed. |
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