A framework for fault tolerant real time systems based on reconfigurable FPGAs

To increase the amount of logic available to the usersin SRAM-based FPGAs, manufacturers are usingnanometric technologies to boost logic density andreduce costs, making its use more attractive. However,these technological improvements also make FPGAsparticularly vulnerable to configuration memory bi...

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Bibliographic Details
Main Author: José M. Ferreira (author)
Other Authors: Manuel G. Gericota (author), Luís F. Lemos (author), Gustavo R. Alves (author), Mário M. Barbosa (author)
Format: book
Language:eng
Published: 2006
Subjects:
Engenharia electrotécnica, Engenharia electrotécnica, electrónica e informática
Electrical engineering, Electrical engineering, Electronic engineering, Information engineering
Online Access:https://repositorio-aberto.up.pt/handle/10216/84054
Country:Portugal
Oai:oai:repositorio-aberto.up.pt:10216/84054

Internet

https://repositorio-aberto.up.pt/handle/10216/84054

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