APA (7th ed.) Citation

Esteves, A., & Proença, A. J. (2005). A hardware/software partition methodology targeted to an FPGA/CPLD architecture.

Chicago Style (17th ed.) Citation

Esteves, António, and Alberto José Proença. A Hardware/software Partition Methodology Targeted to an FPGA/CPLD Architecture. 2005.

MLA (8th ed.) Citation

Esteves, António, and Alberto José Proença. A Hardware/software Partition Methodology Targeted to an FPGA/CPLD Architecture. 2005.