On-chip array of thermoelectric peltier microcoolers

This article reports on the theoretical modelling, the Finite Element Modelling (FEM) simulation, the fabrication process and preliminary results of the first on-chip thermoelectric microcooler array (64 pixels arranged in a 88 array), with each pixel independently controlled. This microcooler arra...

Full description

Bibliographic Details
Main Author: Gonçalves, L. M. (author)
Other Authors: Rocha, J. G. (author), Couto, C. (author), Alpuim, P. (author), Correia, J. H. (author)
Format: conferencePaper
Language:eng
Published: 2007
Subjects:
Telluride peltier
Array
telluride peltier microcooler array
Science & Technology
Online Access:http://hdl.handle.net/1822/8389
Country:Portugal
Oai:oai:repositorium.sdum.uminho.pt:1822/8389
Description
Summary:This article reports on the theoretical modelling, the Finite Element Modelling (FEM) simulation, the fabrication process and preliminary results of the first on-chip thermoelectric microcooler array (64 pixels arranged in a 88 array), with each pixel independently controlled. This microcooler array uses co-evaporated V–VI compounds of Bi2Te3 and Sb2Te3 as thermoelectric layers, and can be fabricated using planar thin-film technology, lithography and wet etching on top of a silicon wafer, where the CMOS electronic circuits were previously made

Similar Items